set_property PACKAGE_PIN AA20 [get_ports {hdmi_clk[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_clk[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_clk[0]}]
set_property PACKAGE_PIN AC20 [get_ports {hdmi_d0[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d0[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d0[0]}]
set_property PACKAGE_PIN AA22 [get_ports {hdmi_d1[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d1[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d1[0]}]
set_property PACKAGE_PIN AB24 [get_ports {hdmi_d2[1]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d2[0]}]
set_property IOSTANDARD TMDS_33 [get_ports {hdmi_d2[1]}]
set_property PACKAGE_PIN R19 [get_ports reset_n]
set_property IOSTANDARD LVCMOS33 [get_ports reset_n]
set_property PACKAGE_PIN AD12 [get_ports clock_p]
set_property IOSTANDARD DIFF_SSTL15 [get_ports clock_p]


create_clock -period 5.000 -waveform {0.000 2.500} [get_ports clock_p]
create_clock -period 5.000 -waveform {2.500 5.000} [get_ports clock_n]





set_property PACKAGE_PIN P27 [get_ports zoom_mode]
set_property IOSTANDARD LVCMOS33 [get_ports zoom_mode]

set_property PACKAGE_PIN P26 [get_ports freeze]
set_property IOSTANDARD LVCMOS33 [get_ports freeze]

set_property PACKAGE_PIN D26 [get_ports {csi0_clk[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_clk[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_clk[0]}]
set_property PACKAGE_PIN B30 [get_ports {csi0_d1[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d1[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d1[0]}]
set_property PACKAGE_PIN B28 [get_ports {csi0_d3[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d3[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d3[0]}]
set_property PACKAGE_PIN D29 [get_ports {csi0_d0[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d0[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d0[0]}]
set_property PACKAGE_PIN B27 [get_ports {csi0_d2[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d2[1]}]
set_property IOSTANDARD LVDS_25 [get_ports {csi0_d2[0]}]
set_property PACKAGE_PIN M28 [get_ports cam_mclk]
set_property IOSTANDARD LVCMOS25 [get_ports cam_mclk]
set_property PACKAGE_PIN L28 [get_ports cam_i2c_sck]
set_property IOSTANDARD LVCMOS25 [get_ports cam_i2c_sck]
set_property PACKAGE_PIN J29 [get_ports cam_i2c_sda]
set_property IOSTANDARD LVCMOS25 [get_ports cam_i2c_sda]
set_property PACKAGE_PIN N21 [get_ports cam_rstn]
set_property IOSTANDARD LVCMOS25 [get_ports cam_rstn]



create_clock -period 2.500 -name csi -waveform {0.000 1.250} [get_ports {csi0_clk[1]}]
create_clock -period 2.500 -name csi2 -waveform {1.250 2.500} [get_ports {csi0_clk[0]}]
set_input_delay -clock [get_clocks csi] 1.000 [get_ports {{csi0_d0[0]} {csi0_d0[1]} {csi0_d1[0]} {csi0_d1[1]} {csi0_d2[0]} {csi0_d2[1]} {csi0_d3[0]} {csi0_d3[1]}}]
set_input_delay -clock [get_clocks csi] -clock_fall 1.000 [get_ports {{csi0_d0[0]} {csi0_d0[1]} {csi0_d1[0]} {csi0_d1[1]} {csi0_d2[0]} {csi0_d2[1]} {csi0_d3[0]} {csi0_d3[1]}}]

set_output_delay -clock [get_clocks [get_clocks -filter {IS_GENERATED && MASTER_CLOCK == clock_p} -of_objects [get_pins pll1/inst/plle2_adv_inst/CLKOUT1]]] 0.000 [get_ports {{hdmi_clk[0]} {hdmi_clk[1]} {hdmi_d0[0]} {hdmi_d0[1]} {hdmi_d1[0]} {hdmi_d1[1]} {hdmi_d2[0]} {hdmi_d2[1]}}]
set_output_delay -clock [get_clocks [get_clocks -filter {IS_GENERATED && MASTER_CLOCK == clock_p} -of_objects [get_pins pll1/inst/plle2_adv_inst/CLKOUT1]]] -clock_fall 0.000 [get_ports {{hdmi_clk[0]} {hdmi_clk[1]} {hdmi_d0[0]} {hdmi_d0[1]} {hdmi_d1[0]} {hdmi_d1[1]} {hdmi_d2[0]} {hdmi_d2[1]}}]

set_property PACKAGE_PIN AH20 [get_ports {vga_b[0]}]
set_property PACKAGE_PIN AG20 [get_ports {vga_b[1]}]
set_property PACKAGE_PIN AF21 [get_ports {vga_b[2]}]
set_property PACKAGE_PIN AK20 [get_ports {vga_b[3]}]
set_property PACKAGE_PIN AG22 [get_ports {vga_b[4]}]
set_property PACKAGE_PIN AJ23 [get_ports {vga_g[0]}]
set_property PACKAGE_PIN AJ22 [get_ports {vga_g[1]}]
set_property PACKAGE_PIN AH22 [get_ports {vga_g[2]}]
set_property PACKAGE_PIN AK21 [get_ports {vga_g[3]}]
set_property PACKAGE_PIN AJ21 [get_ports {vga_g[4]}]
set_property PACKAGE_PIN AK23 [get_ports {vga_g[5]}]
set_property PACKAGE_PIN AF20 [get_ports vga_hsync]
set_property PACKAGE_PIN AK25 [get_ports {vga_r[0]}]
set_property PACKAGE_PIN AG25 [get_ports {vga_r[1]}]
set_property PACKAGE_PIN AH25 [get_ports {vga_r[2]}]
set_property PACKAGE_PIN AK24 [get_ports {vga_r[3]}]
set_property PACKAGE_PIN AJ24 [get_ports {vga_r[4]}]
set_property PACKAGE_PIN AG23 [get_ports vga_vsync]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports vga_hsync]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports vga_vsync]
